1. Field
This invention relates generally to memory fabrication, and more particularly to a semiconductor processing method for flash memory fabrication.
2. Background Art
The semiconductor market has been undergoing extensive growth over the past few decades. This trend is expected to continue for the foreseeable future since a large portion of this market is the memory segment. The memory segment can be broadly categorized into two classes, namely volatile memory and non-volatile memory. Volatile memory such as SRAM and DRAM lose their data content when the power supply is removed. In contrast, non-volatile memories such as EEPROM and flash memories maintain their data content after the power supply has been removed.
Non-volatile memories offer particular advantages, and thereby support a wide range of applications including computer, automotive and consumer electronic devices. Flash memory is a non-voltage memory that can be electrically erased and reprogrammed. In fact, flash memory has undergone an explosive market growth that has in particular been driven by cellular telephones, memory cards, flash drives and other types of portable data storage devices. Indeed, with the need to support persistent data storage in portable devices, it is clear that the flash memory will continue to grow at an ever increasing rate. Further, the market place will demand flash memory designs that support lower cost and higher performance, including higher densities of storage.
The basic concept of a charge trap flash memory cell is that of a charge trap layer in a semiconductor transistor. The electrical isolation of the charge trap layer is accomplished by surrounding it with dielectric material, such as an oxide. Typically, charge trap flash memory cells use two oxide layers, a “bottom” oxide layer and a “top” oxide layer. The top oxide layer in a flash memory cell plays a key role in determining flash memory cell performance and reliability.